(1) Field of the Invention
The present invention relates to a semiconductor integrated circuit having a test circuit for testing an internal circuit. More particularly, it relates to a semiconductor integrated circuit having a test circuit for high-speed testing of the functions of the internal circuit.
One of the uses to which such a semiconductor integrated circuit is put is as a DTMF (dual tone multi frequency)/pulse dialer provided in a telephone circuit; the dialer comprises two circuits, namely, a circuit for the DTMF dialer and a circuit for the pulse dialer, on one chip, and performs two functions selectively, namely, the function of a DTMF dialer and the function of a pulse dialer.
(2) Description of the Related Art
Generally, the semiconductor integrated circuit used as the above-mentioned DTMF/pulse dialer comprises an internal circuit having the circuit for DTMF dialer and the circuit for pulse dialer, and an oscillating circuit generating a fundamental clock signal for operating the internal circuit when the internal circuit is operated in a usual mode. Further, the semiconductor intergrated circuit has a predetermined number of pins (for example, eighteen) each of which functions as a terminal. In this connection, the pins are provided for several purposes: e.g., input pins for supplying input signals from a keyboard to the internal circuit in accordance with the operation of the keys provided on the keyboard; output pins for transmitting output signals from the internal circuit to a switching system; a pair of pins for the oscillating circuit which are connected to the input side and output side of the oscillating circuit respectively; a pin for supplying an external reset signal to the internal circuit; and a pair of pins for supplying power from a power source to the semiconductor intergrated circuit. The internal circuit operates as the DTMF dialer and as the pulse dialer selectively, in accordance with the control signal input from one of the input pins.
When the internal circuit operates as the DTMF dialer, the signal output from the internal circuit is an analog signal including frequency components corresponding to the operated key. Namely, the frequency components are determined in accordance with the position (i.e., the row and the column) on the keyboard where the operated key is arranged. Thus, the analog signal sequentially including the frequency components in accordance with the sequentially operated keys is output from one of the output pins and transmitted to the switching system. In this connection, the operational speed of the DTMF dialer is high, and the circuit for the DTMF dialer provided in the internal circuit is operated by receiving a fundamental clock signal, the frequency of which is a high value of, for example, 3.58 m.c. (megacycles), from the above-mentioned oscillating circuit.
Contrary to this, when the internal circuit operates as the pulse dialer, the signal output from the internal circuit is a digital signal including a number of pulses which corresponds to the number indicated on the operated key. Thus, if three keys, numbered "1", "2", and "0", are sequentially operated, for example, the digital signal as shown in FIG. 4 is output from one of the output pins and transmitted to the switching system. In this connection, the operational speed of the pulse dialer is low compared to the operational speed of the DTMF dialer. As an explanation of this phenomenon regarding the signal shown in FIG. 4, each of the time lengths of the predigital pause t.sub.1 and the interdigital pause t.sub.2 is set to about 1 s. (sec), and the cycle time of one pulse t.sub.3 is set to about 100 ms. (milli-sec). Therefore, it is necessary to operate the circuit for the pulse dialer provided in the internal circuit by using the clock signal, the frequency of which is a low value of, for example, 2 kc (kilocycles).
However, as described above, the frequency of the fundamental clock signal generated from the oscillating circuit is set to the high value of, for example, 3.58 ms., in order to operate the circuit for the DTMF dialer in the internal circuit. Therefore, it is necessary to supply the clock signal to the circuit for the pulse dialer in the internal circuit by dividing the frequency of the fudamental clock signal, generated from the oscillating circuit, through a frequency divider.
Under the above-mentioned background, in the prior art, when the tests of the functions of the internal circuit (especially the functions of the circuit for the pulse dialer in the internal circuit) are carried out, the above-mentioned clock signal obtained by dividing the frequency of the fundamental clock signal generated from the oscillating circuit is also used as the clock signal for testing. In this connection, it is necessary to perform several kinds of tests in order to test the functions of the internal circuit. Namely, it is necessary to test the function of each key in the DTMF dialer mode and in the pulse dialer mode by testing each key to determine whether or not the correct signal corresponding to the operated key is output from the predetermined output pin. In addition, it is also necessary to test the function of a redial key by determining whether or not the correct signal is output again when the redial key is operated.
However, in the prior art, as the internal circuit (especially the circuit for the pulse dialer) is operated by the above-mentioned clock signal, the frequency of which is divided through the frequency divider, in the test mode as well as in the usual mode, a problem arises in that a long time is needed to perform the several tests as above-mentioned, and as a result, the efficiency of the production is remarkably lowered, especially when the tests of the functions of the internal circuit are carried out during the process of mass production.
To solve this problem, consideration has been given to providing an exclusive terminal for testing besides the above-mentioned generally existing pin terminals and to supplying the clock signal for testing to the internal circuit through that exclusive terminal. However, in this case, it becomes necessary to provide an additional pin terminal for testing on each chip, and as a result, the size of the device is increased.